Details
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Type: Bug
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Status: Closed
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Priority: Major
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Resolution: Fixed
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Affects Version/s: V1.11.0.10, V1.12.0.3, V1.13.0.1
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Fix Version/s: V1.11.0.12, V1.12.0.5, V1.13.0.5, V1.13.1.0
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Component/s: Device
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Labels:None
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Account:SPC Profinet Core (SPCPROFINET)
Description
Depending on configured timings and phase lengths, cyclic frames might be delayed or missing during IRT operation. In addition, unexpected DPM timings might be observed.
The problem is caused due to a race condition between timing peripherals and interrupt processing. It was introduced during fixing PSPNCORE-495.
Attachments
Issue Links
- blocks
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PSPNSV5-390 Missing/delayed cyclic frames during IRT operation
- Closed
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PSPNSV5-391 Update Profinet Core to V1.11.0.12
- Closed
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PSPNSV5-392 Update Profinet Core to V1.13.0.5
- Closed
- relates to
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PSPNSV4-1352 Update Profinet Core to V1.13.0.5
- Closed
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PSPNCORE-495 Unstable IRT operation of all eCos based firmwares
- Closed
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PSPNSV4-1353 Missing/delayed cyclic frames during IRT operation
- Closed