Details
Description
Currently Drv_Spi blocks the data in 16 Byte chunks onto the wire (Implemented due to netX100/500 Errata Nr.9).
Sequence:
1. Fill FIFO
2. Start Transfer
3. Wait for FIFO Empty IRQ
4. goto 1
This results in pauses (measured 30us on netX50 running from SDRAM) between chunks