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  1. EtherNet/IP Core V2
  2. PSEIPCORE-78

[DLR] State machine events 14,15 - Missing check of lastReceivePort before transition to state NORMAL

    Details

    • Type: Bug
    • Status: Closed
    • Priority: Minor
    • Resolution: Fixed
    • Affects Version/s: V2.0.16.0
    • Fix Version/s: V2.0.17.0, V2.1.0.0
    • Labels:
      None
    • Account:
      SPC EthernetIp Core (SPCETHERNET)

      Description

      In the implementation of event 14 and 15 of the beacon based state machine, the check for the correct lastRecvPort is missing. Due to that it can happen that the DLR stack transitions to state NORMAL although it's not supposed to.

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                • Reporter:
                  KMichel Kai Michel
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                  • Created:
                    Updated:
                    Resolved: