NetX51 MMIO mapping of sync signals differs from design in guide

Sync0 and Sync1 should be mapped to MMIO 10 und MMIO 11
according to the design in guide.

But the config.c file has following mapping:

{ 0, MMIO_CONFIG_XC_TRIGGER1, 0, 0 }

, /* Sync 1: XC5.2 */

{ 1, MMIO_CONFIG_XC_TRIGGER0, 0, 0 }

, /* Sync 0: XC5.1 */

{ 2, MMIO_CONFIG_XC_SAMPLE1, 0, 0 }

, /* Latch 1: XC5.4 */

{ 3, MMIO_CONFIG_XC_SAMPLE0, 0, 0 }

, /* Latch 0: XC5.3 */