Details

    • Type: Bug
    • Status: Resolved
    • Priority: Minor
    • Resolution: Fixed
    • Affects Version/s: None
    • Fix Version/s: V2.0000.10.110, V1.1100.9.3287
    • Component/s: DTM
    • Labels:
      None
    • Account:
      SPC Sercos Slave (SPCSERCOSSL)

      Description

      During configuration, the signals are created incorrectly. This situation occurs when the cycle times of the master and the slave are edited. 
      Before the change, the signals are completely displayed in the address table.


      After changing the cycle times, the previous signals are replaced by one signal and the length is added up.

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                  • Reporter:
                    NMihaylov Nikolay Mihaylov
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                    Dates

                    • Created:
                      Updated:
                      Resolved: