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<SerialFlash name="W25Q64CV" size_bytes="8388608" address_bits="24">
<Description>Winbond W25Q64CVZPAG</Description>
<Speed fifo_clock_khz="33000" xip_clock_khz="80000">
<Limit netx="500" fifo_clock_khz="25000" xip_clock_khz="0" />
<Limit netx="50" fifo_clock_khz="25000" xip_clock_khz="0" />
<Limit netx="51" fifo_clock_khz="25000" xip_clock_khz="80000" />
</Speed>
<Erase>
<Block0 size_bytes="4096" command="0x20" typical_time_ms="45" />
<Block1 size_bytes="32768" command="0x52" typical_time_ms="120" />
<Block2 size_bytes="65536" command="0xd8" typical_time_ms="150" />
<Block3 size_bytes="" command="" typical_time_ms="" />
<Chip command="0xc7" typical_time_ms="10000" />
</Erase>
<Layout mode="linear">
<Block size_bytes="8388608" has_erase_block0="true" has_erase_block1="true" has_erase_block2="true" has_erase_block3="false" />
</Layout>
<Read>
<Read1Bit command="0x03" dummy_bytes="0" />
<ReadFast command="0xeb" dummy_bytes="8" idle_cycles="4">
<BusWidth command="1" address="4" dummy_idle="4" data="4"/>
</ReadFast>
</Read>
<Write writeEnableCommand="0x06">
<Write1Bit command="0x02" dummy_bytes="0" />
<WriteFast command="0x32" dummy_bytes="0" idle_cycles="0">
<BusWidth command="1" address="1" dummy_idle="1" data="4"/>
</WriteFast>
</Write>
<Status readStatusCommand="0x05" statusReadyMask="0x01" statusReadyValue="0x00" />
<Initialize># Send 2 dummy bytes.
SMC_DUMMY, SMCS_NNN, 2
# Send the command 0x9f.
SMC_SEND, SMCS_SNN, 1, 0x9f
# Receive 3 bytes.
SMC_RECEIVE, SMCS_SDD, 3
# Compare the JEDEC ID.
SMC_CMP, 3, 0xef, 0x40, 0x17
# Fail if it does not match.
SMC_FAIL, SPI_MACRO_CONDITION_NotEqual
# Read status register 2.
SMC_SEND, SMCS_SNN, 1, 0x35
SMC_RECEIVE, SMCS_SDD, 1
# Keep only bit #2.
SMC_MASK, 1, 0x02
# Skip setting the QE bit if it is already 1.
SMC_JUMP, SPI_MACRO_CONDITION_Zero, QeOK
# Write enable.
SMC_SEND, SMCS_SDD, 1, 0x06
# Write the status register.
SMC_SEND, SMCS_SDD, 3, 0x01, 0x02
QeOK:</Initialize>
<XipInitialize># Send 2 dummy bytes.
SMC_DUMMY, SMCS_NNN, 2
# Send the command 0xeb.
SMC_SEND, SMCS_SNN, 1, 0xeb
# Switch to 4 bit mode.
SMC_MODE, SPI_BUS_WIDTH_4BIT
# Send a 3 byte address and the continue bit.
SMC_SEND, SMCS_SNN, 4, 0x00, 0x00, 0x00, 0xa5
# Send 4 idle cycles.
SMC_IDLE, SMCS_SNN, 4
# Receive 4 bytes.
SMC_RECEIVE, SMCS_SDD, 4
# Change the transport to SQI ROM.
# Use 4 dummy cycles, 24 address bits and 6 address nibbles.
SMC_CHTR, SPI_MACRO_CHANGE_TRANSPORT_ROM, 4, 24, 6</XipInitialize>
<XipLeave># Change the transport to FIFO.
SMC_CHTR, SPI_MACRO_CHANGE_TRANSPORT_FIFO
# Send a 3 byte address and no continue bit.
SMC_SEND, SMCS_SNN, 4, 0x00, 0x00, 0x00, 0xff
# Send 4 idle cycles.
SMC_IDLE, SMCS_SNN, 4
# Receive 4 bytes.
SMC_RECEIVE, SMCS_SDD, 4
# Go back to 1 bit mode.
SMC_MODE, SPI_BUS_WIDTH_1BIT
# Send 2 dummy bytes.
SMC_DUMMY, SMCS_NNN, 2</XipLeave>
</SerialFlash>
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<SerialFlash name="W25Q64CV" size_bytes="8388608" address_bits="24">
<Description>Winbond W25Q64CVZPAG</Description>
<Speed fifo_clock_khz="33000" xip_clock_khz="80000">
<Limit netx="500" fifo_clock_khz="25000" xip_clock_khz="0" />
<Limit netx="50" fifo_clock_khz="25000" xip_clock_khz="0" />
<Limit netx="51" fifo_clock_khz="25000" xip_clock_khz="80000" />
</Speed>
<Erase>
<Block0 size_bytes="4096" command="0x20" typical_time_ms="45" />
<Block1 size_bytes="32768" command="0x52" typical_time_ms="120" />
<Block2 size_bytes="65536" command="0xd8" typical_time_ms="150" />
<Block3 size_bytes="" command="" typical_time_ms="" />
<Chip command="0xc7" typical_time_ms="10000" />
</Erase>
<Layout mode="linear">
<Block size_bytes="8388608" has_erase_block0="true" has_erase_block1="true" has_erase_block2="true" has_erase_block3="false" />
</Layout>
<Read>
<Read1Bit command="0x03" dummy_bytes="0" />
<ReadFast command="0xeb" dummy_bytes="8" idle_cycles="4">
<BusWidth command="1" address="4" dummy_idle="4" data="4"/>
</ReadFast>
</Read>
<Write writeEnableCommand="0x06">
<Write1Bit command="0x02" dummy_bytes="0" />
<WriteFast command="0x32" dummy_bytes="0" idle_cycles="0">
<BusWidth command="1" address="1" dummy_idle="1" data="4"/>
</WriteFast>
</Write>
<Status readStatusCommand="0x05" statusReadyMask="0x01" statusReadyValue="0x00" />
<Initialize># Send 2 dummy bytes.
SMC_DUMMY, SMCS_NNN, 2
# Send the command 0x9f.
SMC_SEND, SMCS_SNN, 1, 0x9f
# Receive 3 bytes.
SMC_RECEIVE, SMCS_SDD, 3
# Compare the JEDEC ID.
SMC_CMP, 3, 0xef, 0x40, 0x17
# Fail if it does not match.
SMC_FAIL, SPI_MACRO_CONDITION_NotEqual
# Read status register 2.
SMC_SEND, SMCS_SNN, 1, 0x35
SMC_RECEIVE, SMCS_SDD, 1
# Keep only bit #2.
SMC_MASK, 1, 0x02
# Skip setting the QE bit if it is already 1.
SMC_JUMP, SPI_MACRO_CONDITION_Zero, QeOK
# Write enable.
SMC_SEND, SMCS_SDD, 1, 0x06
# Write the status register.
SMC_SEND, SMCS_SDD, 3, 0x01, 0x02
QeOK:</Initialize>
<XipInitialize># Send 2 dummy bytes.
SMC_DUMMY, SMCS_NNN, 2
# Send the command 0xeb.
SMC_SEND, SMCS_SNN, 1, 0xeb
# Switch to 4 bit mode.
SMC_MODE, SPI_BUS_WIDTH_4BIT
# Send a 3 byte address and the continue bit.
SMC_SEND, SMCS_SNN, 4, 0x00, 0x00, 0x00, 0xa5
# Send 4 idle cycles.
SMC_IDLE, SMCS_SNN, 4
# Receive 4 bytes.
SMC_RECEIVE, SMCS_SDD, 4
# Change the transport to SQI ROM.
# Use 4 dummy cycles, 24 address bits and 6 address nibbles.
SMC_CHTR, SPI_MACRO_CHANGE_TRANSPORT_ROM, 4, 24, 6</XipInitialize>
<XipLeave># Change the transport to FIFO.
SMC_CHTR, SPI_MACRO_CHANGE_TRANSPORT_FIFO
# Send a 3 byte address and no continue bit.
SMC_SEND, SMCS_SNN, 4, 0x00, 0x00, 0x00, 0xff
# Send 4 idle cycles.
SMC_IDLE, SMCS_SNN, 4
# Receive 4 bytes.
SMC_RECEIVE, SMCS_SDD, 4
# Go back to 1 bit mode.
SMC_MODE, SPI_BUS_WIDTH_1BIT
# Send 2 dummy bytes.
SMC_DUMMY, SMCS_NNN, 2</XipLeave>
</SerialFlash>
Component
